Computer Architecture Group

My team will conduct excellent research on the methodology of hardware optimization and acceleration. The goal to build a runtime reconfigurable hardware and software to enable near Application-Specific Integrated-Circuit (ASIC) performance with maintaining the programmability for data-intensive algorithms such as machine learning and data science in particular. ASIC can give a better power efficiency, throughput and response time in terms of performance. Typical software can allow a more flexible design process that can reduce the development cost and time. Our research takes both advantages and these results in the ability to develop and run data-intensive algorithms at very low cost but high performance and power-friendly.